1. Field of the Invention
The present invention relates to a thin film transistor formed of low temperature polysilicon formed over an insulating substrate such as a glass substrate and a method of manufacturing the same.
2. Description of Related Art
In display devices such as a liquid crystal display, a thin film transistor (TFT) formed over an insulating substrate such as a glass substrate is used as a switching device of a pixel. When forming a thin film transistor especially with low temperature polysilicon, it is possible to form a circuit for driving a display device at the same time, not only a pixel switching device. This enables to mount the function which used to rely on an external IC (Integrated Circuit) and thereby to improve the reliability and reduce the cost.
An example of the structure of the thin film transistor is disclosed in Japanese Unexamined Patent Application Publication No. 11-261076 (hereinafter referred to as a related art). A cross-sectional diagram of the thin film transistor according to the related art is shown in FIG. 17. As shown in FIG. 17, the thin film transistor according to the related art includes a polysilicon layer 101 to be a semiconductor layer. The polysilicon layer 101 has a source region 104 and a drain region 106 which include impurities and are conductive. Moreover, a channel region 103 is formed to the polysilicon layer 101 held between these regions. A gate insulating film 111 is formed to cover the channel region 103. Over the gate insulating film 111 of the channel region 103, a gate electrode 110 formed of an aluminum layer 112, an alumina layer 113, a metal layer 114 and an anodic oxide layer 115 is formed. An interlayer insulating film 102 is formed to cover these layers and a contact hole is formed to the interlayer insulating film 102 located in the upper layer of the source region 104 and the drain region 106, respectively. A source electrode 108 and a drain electrode 109 are electrically connected respectively with the source region 104 and the drain region 106 of the polysilicon layer 101 via these contact holes. Here, as for the thin film transistor disclosed in the related art, the surface of the source region 104 and the drain region 106 (regions 105 and 107) is silicided and the source electrode 108 and the drain electrode 109 are connected to this silicide layer.
Generally, a source region and a drain region desirably have low resistance. Therefore, impurities such as boron or phosphorus are introduced into a polysilicon layer to reduce the resistance of the polysilicon layer. However, even for such a polysilicon layer, the sheet resistance is about several kΩ/□ to several ten kΩ/□, and its resistance value is extremely high compared with a metallic film. Accordingly, in the related art, the resistance value of this source region 104 and the drain region 106 is reduced by siliciding the surface of the source region 104 and the drain region 106.
However, since the silicide layer (the regions 105 and 107) of the thin film transistor according to the related art is very thin, this silicide layer could be reduced by a dry etching in the process of forming the contact holes. Thus there is a problem that due to the reduced amount, a variation is generated in the contact resistance value of the source region 104 and drain region 106, and the source electrode 108 and the drain electrode 109.